Design & Reuse
Catalog of SIP Cores
System on Chip design resources
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321 IP
201
0.0
GDDR6 PHY for TSMC
High-performance IP for graphics, AI/ML, and automotive products Cadence silicon-proven GDDR6 PHY and controller IP showcase leading-edge BER, BIST...
202
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GDDR6X Controller IP
GDDR6X interface provides full support for the GDDR6X interface, compatible with GDDR6X protocol draft specification and DFI-version 4.0 or 5.0 Specif...
203
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GDDR7 Memory PHY for GLOBALFOUNDRIES at 16Gbps
High performance for graphics, AI, and automotive products The Cadence IP solution for GDDR7 consists of high-performance hardened PHY, serving hig...
204
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GDDR7 Memory PHY for Samsung at 16Gbps
High performance for graphics, AI, and automotive products The Cadence IP solution for GDDR7 consists of high-performance hardened PHY, serving hig...
205
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GDDR7 Memory PHY for TSMC
High performance for graphics, AI, and automotive products The Cadence IP solution for GDDR7 consists of high-performance hardened PHY, serving hig...
206
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GDDR7 Memory PHY for TSMC at 16Gbps
High performance for graphics, AI, and automotive products The Cadence IP solution for GDDR7 consists of high-performance hardened PHY, serving hig...
207
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GDDR7 Memory PHY for TSMC at 22Gbps
High performance for graphics, AI, and automotive products The Cadence IP solution for GDDR7 consists of high-performance hardened PHY, serving hig...
208
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DDR 4/3 Memory Controller IP - 2400MHz
This memory controller supports DDR3/4 SDRAM. DDR3/4 memory controller is a high-speed interface used for data read/write between internal engine and ...
209
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DDR Memory Controller IP for low power and high reliability
DDR interface provides full support for the DDR interface, compatible with JESD79F specification and DFI-version 2.0 or higher Specification Compliant...
210
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DDR123/LPDDR23 in SMIC 55NLL
Brite Semiconductor provides a complete DDR subsystem including not only controller, PHY and IO, also corresponding tuning and configuration software....
211
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DDR2 & DDR3 Fault Tolerant Memory Controller
FTADDR is a memory controller for DDR2 and DDR3 SDRAM memory devices. It uses a strong error correction code to achieve exceptional fault tolerance. ...
212
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DDR2 SDRAM Controller IP
DDR2 interface provides full support for the DDR2 interface, compatible with JESD79-2F specification and DFI-version 2.0 or higher Specification Compl...
213
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DDR2,3/LPDDR2,3 combo DDR PHY+ Controller upto 1333Mbps in SMIC 55NLL
Brite Semiconductor provides a complete DDR subsystem including not only controller, PHY and IO, also corresponding tuning and configuration software....
214
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DDR23/LPDDR23 in SMIC 40NLL
Brite Semiconductor provides a complete DDR subsystem including not only controller, PHY and IO, also corresponding tuning and configuration software....
215
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DDR23/LPDDR23 PHY+Controller in SMIC 28HKD 0.9/2.5V
DDR23/LPDDR23 combo DDR PHY + Controller upto 1600Mbps for IoT application...
216
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DDR3 Controller IP
The AXI DDR3 Controller provides access to DDR3 memory. It accepts the Read / Write commands from AXI and converts it into DDR3 access. While doing th...
217
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DDR3 Memory Controller
Rambus’s DDR3 Controller Core offered by Rambus is designed for use in applications requiring high memory throughput, high clock rates and full progra...
218
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DDR3 PHY
Designed for server, networking, computing and consumer applications, our DDR4 multi-modal memory PHY is optimized for performance. The DDR4 multi-...
219
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DDR3 SDRAM Controller IP with advance feautures package
DDR3 interface provides full support for the DDR3 interface, compatible with JESD79-3F specification and DFI-version 2.0 or higher Specification Compl...
220
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DDR3/ DDR2 Combo PHY IP - 1866Mbps (Silicon Proven in UMC 40LP)
The DDR3/2 PHY is compatible with JEDEC DDR3 and JEDEC DDR2 SDRAMs, supports a range of DDR3 DRAM speeds from 666Mbps to1866Mbps and DDR2 DRAM speeds ...
221
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DDR3/ DDR3L Combo PHY IP - 1600Mbps (Silicon Proven in UMC 40LP)
This DDR PHY IP(Double Data Rate) supports DRAM type DDR3, DDR3L this PHY provides low latency, and enables up to 1600Mbps throughput. The DDR IP is c...
222
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DDR3/3L Controller IP
SmartDV’s DDR3/3L Controller IP is a silicon-proven, high-performance solution designed to enable efficient memory interfacing for a wide range of app...
223
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DDR3/3L/DDR4/LPDDR4 PHY
The DDR3, DDR3L, DDR4, and LPDDR4 Combo PHY is designed for easy integration into any System-On-Chip (SOC) and can be seamlessly connected to a third-...
224
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DDR34/LPDDR23 in SMIC 40NLL
Brite Semiconductor provides a complete DDR subsystem including not only controller, PHY and IO, also corresponding tuning and configuration software....
225
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DDR34/LPDDR34 PHY in SMIC 28HKC+
Brite Semiconductor provides a complete DDR subsystem including not only controller, PHY and IO, also corresponding tuning and configuration software....
226
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DDR34/LPDDR34 PHY in SMIC 28HKD 0.9/1.8V
Brite Semiconductor provides a complete DDR subsystem including not only controller, PHY and IO, also corresponding tuning and configuration software....
227
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DDR34/LPDDR34 PHY in SMIC 28HKD 0.9/2.5V
Brite Semiconductor provides a complete DDR subsystem including not only controller, PHY and IO, also corresponding tuning and configuration software....
228
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DDR3L Memory Controller IP optimized for low latency
DDR3L interface provides full support for the DDR3L interface, compatible with DDR3L protocol standard of 8GB_DDR3L and DFI-version 3.1 or higher Spec...
229
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DDR3L/ LPDDR4/ DDR4 PHY IP - 1866Mbps (Silicon Proven in UMC 28HPC+)
The DDR3L/ DDR4/ LPDDR4 Combo PHY IP offers low latency and supports throughput of up to 1866Mbps. The PHY IP is silicon validated in the UMC 28HPC+ p...
230
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DDR4 / DDR3/ DDR3L / LPDDR4 Memory Controller IP optimized for low latency
The DDR (Double Data Rate) controller IP is for LPDDR4 and DDR4/3/3L optimized for low latency. The Controller IP is silicon proven and connects to DD...
231
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DDR4 Controller IP
SmartDV’s DDR4 Controller IP is a high-performance, feature-rich solution designed to manage seamless communication between processors and DDR4 memory...
232
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DDR4 in SMIC 55NLL
Brite Semiconductor provides a complete DDR subsystem including not only controller, PHY and IO, also corresponding tuning and configuration software....
233
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DDR4 Memory Controller
Rambus DDR4 Controller Core from Rambus is designed for use in applications requiring high memory throughput, high clock rates and full programmabilit...
234
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DDR4 Memory Controller IP with high performance
DDR4 is full-featured, easy-to-use, synthesizable design, compatible with DDR4 JESD79-4, JESD79-4A, JESD79-4A_r2, JESD79-4B, JESD79-4C and JESD79-4D (...
235
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DDR4 Multi-modal PHY
Designed for server, networking, computing and consumer applications, our DDR4 multi-modal memory PHY is optimized for performance. The DDR4 multi-...
236
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DDR4 PHY
Designed for server, networking, computing and consumer applications, our DDR4 multi-modal memory PHY is optimized for performance. The DDR4 multi-...
237
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DDR4 PHY, 16nm/12nm
The DDR4 PHY is designed for easy integration into any System-On-Chip (SOC) and can be seamlessly connected with a third-party DFI-compliant DDR4 memo...
238
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DDR4/ DDR3 Combo PHY IP - 2400Mbps (Silicon Proven in UMC 28HPC+)
The DDR4/3 PHY is compatible with JEDEC DDR3 and JEDEC DDR4 SDRAMs, supports a range of DDR3 DRAM speeds from 666Mbps to 2133Mbps and DDR4 DRAM speeds...
239
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DDR4/ DDR3/ DDR3L Combo PHY IP - 1600Mpbs (Silicon Proven in TSMC 28HPC+)
This DDR (Double Data Rate) PHY IP supports DDR3/DDR3L/DDR4, provides low latency, and enables up to 1600Mbps throughput. The PHY IP is silicon proven...
240
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DDR4/ LPDDR4/ DDR3L PHY IP - 1866Mbps (Silicon Proven in TSMC 28HPC+)
The LPDDR4/ DDR4/ DDR3L Combo PHY IP offers low latency and supports throughput of up to 1866Mbps. The PHY IP is silicon validated in the TSMC 28HPC+ ...
241
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DDR4/ LPDDR4/ DDR3L PHY IP - 3200Mbps (Silicon Proven in TSMC 12FFC)
The DDR4/ DDR3L/ LPDDR4 Combo PHY IP provides low latency and enables up to 3200Mbps throughput. The PHY IP is compliant with the latest JEDEC standar...
242
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DDR4/3 Memory PHY for GLOBALFOUNDRIES
Provides the industry's highest data rates with low-latency througput while balancing power consumption and minimizing area. The latest, the Denali...
243
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DDR4/3 Memory PHY for TSMC
Provides the industry's highest data rates with low-latency througput while balancing power consumption and minimizing area. The latest, the Denali...
244
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DDR4/3 Memory PHY for TSMC N7
Provides the industry's highest data rates with low-latency througput while balancing power consumption and minimizing area The latest, the Denali ...
245
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DDR4/3 Memory PHY for UMC
Provides the industry's highest data rates with low-latency througput while balancing power consumption and minimizing area. The latest, the Denali...
246
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DDR5 CKD 01 - Clock Driver
MAXVY DDR5CKD01 is a high-performance FPGA-proven registering clock driver designed for DDR5 CUDIMM, CSODIMM, and CAMM applications, providing relia...
247
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DDR5 Controller IP
SmartDV’s DDR5 Controller IP is a high-performance solution designed to meet the demands of next-generation memory systems in computing, networking, a...
248
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DDR5 Memory Controller IP with Advanced Feautures
DDR5 is full-featured, easy-to-use, synthesizable design, compatible with DDR5 JESD79-5 and JESD79-5 Rev1.40 (Draft) specification and DFI-version 5.0...
249
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DDR5 Memory PHY for GLOBALFOUNDRIES at 4.8Gbps
Provides the industry's highest data rates with low-latency througput while balancing power consumption and minimizing area. The latest, the DDR5 P...
250
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DDR5 Memory PHY for Samsung at 4.8Gbps
Provides the industry's highest data rates with low-latency througput while balancing power consumption and minimizing area. The latest, the DDR5 P...